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Engineering & Architecture 49d ago

Hardware Verification Engineer

United KingdomUnited Kingdom
GermanyGermany
FranceFrance
BelgiumBelgium
AustriaAustria
NetherlandsNetherlands
SpainSpain
Full-time
Not Disclosed
Senior

Job Description

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About the role

We’re seeking a Hardware Verification Engineer who thrives on solving hard problems, building tools that make life easier for others, and driving verification with both rigor and creativity. This is not a checkbox role — we want someone who is hands-on, curious, and motivated to go beyond the obvious.

The ideal candidate will have a strong background in software development, cryptography, and secure product development, with a focus on delivering secure, high-performance, and efficient products.

We have been established since 2018, so you would be directly working with the founders and inventors of this deep tech startup. The technology is already a couple of years in the making, its feasibility having been established, funding secured, and it has a clear path to market. This is a great opportunity for career progression and to get a head start in a rapidly expanding segment of the technology industry.

What you’ll be doing

You'll be a part of a team verifying security-critical designs where thoroughness is everything. On a daily basis, you will:

  • Build and extend UVM testbenches to verify cryptographic IPs and subsystems.
  • Develop Python-based tools and automation to improve verification productivity.
  • Use formal verification creatively, writing properties beyond canned apps to prove tricky scenarios.
  • Debug at every level - from low-level waveforms to algorithmic mismatches.
  • Collaborate with design, software, and architecture teams to ensure real-world use cases are covered.
  • Approach designs with a "break it to make it" mindset, thinking like an attacher to expose weaknesses.

Key Job Functions

Beyond hands-on verification, you will also:

  • Influence and define methodologies and strategies for design verification.
  • Develop testbench architectures using UVM and formal-based approaches.
  • Define verification plans, functional coverage models, and test strategies for block and subsystem verification.
  • Lead verification at IP or SoC level, including effort estimation, scheduling, task assignment, and reporting progress to management.
  • Drive coverage closure and sign-off quality across complex designs.
  • Mentor junior engineers and help raise the team’s overall capability.

Required Skills And Qualifications

Preferred:

  • Strong background in UVM-based verification at IP and subsystem levels.
  • Proficiency in Python for tool development and automations.
  • Practical formal verification experience, beyond app-based use.
  • Knowledge of cryptographic algorithms (AES, SHA, ECC, etc.) and hardware/software security concepts.
  • Software-oriented thinking (C/C++ or scripting languages) for HW/SW co-verification.
  • Demonstrated leadership in planning and executing verification projects.
  • Self-driven, resourceful, and persistent when solving tough technical challenges.
  • Excellent debugging and problem solving skills with strong attention to detail.

Some of the perks of working with us:

  • Unparalleled opportunities to learn and accelerated career development.
  • A collaborative, team environment with people who truly love what they do.
  • Competitive salary and share option scheme.
  • Flexible and hybrid working, and a working from home budget.
  • Private health insurance for yourself and your family.
  • 25 days annual leave (plus bank holidays and two wellness weeks).
  • 50% gym membership discount.
  • The chance to work with a spirited, smart, and friendly team!

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